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<title>Lesson 2: Logic families: v.2.1</title>
<creator>Cámara Nebreda, José María</creator>
<creator>Cantera Cuartango, Miguel Ángel</creator>
<contributor>Universidad de Burgos. Departamento de Ingeniería Electromecánica</contributor>
<date>2026-09-10</date>
<date>2026-09-10</date>
<date>2026</date>
<type>info:eu-repo/semantics/lecture</type>
<identifier>https://hdl.handle.net/10259/12062</identifier>
<language>eng</language>
<rights>info:eu-repo/semantics/openAccess</rights>
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